This invention relates to a receiver for data which is transmitted in asynchronous bit-serial groups.
Data transmission systems have become commonplace, both for transmission between units in locations remote from one another and for transmission between local units in a system. Frequently the data is organized into words of a given number of bits (binary digits) each. The data may be transmitted a word at a time in parallel form, or the bits of each word may be sent serially. The parallel format requires multiple transmission leads and associated apparatus in the senders and receivers. Therefore the bit-serial format is usually considerably less expensive, but there are added engineering complexities.
The transfer of data in serial form through a single communications channel is generally accomplished by using one of two transmission techniques: synchronous or asynchronous transmission. Synchronous data transmission requires that a clock signal (sync word) be transmitted with the data in order to mark the location of the data bits for the receiver. In some systems, the clock signal is sent on a separate lead. There are also systems in which the clock signal is derived from the received data. With asynchronous transmission, a clock signal is not transmitted with the data and the words (characters) need not be contiguous. In order for the receiver to properly recover a message, start and stop elements are added to each data word. The start-stop principle of word synchronization is used in telegraphy and with teletypewriters.
One example of apparatus with data transmission is a digital switching network, such as may be used in a telephone system with pulse code modulation. In one type of arrangement known as a time-space-time network time slot interchangers at the input and output sides use buffer memories to receive data words in various time slots of each frame, and output the words in other time slots. The incoming time slot interchangers receive data words from incoming terminals and supply them to incoming superhighways, and the outgoing time slot interchangers receive data words from outgoing superhighways and output them to outgoing terminals. A space switching stage between the input and output superhighways actuates crosspoint gates in selected time slots to transmit data from an incoming superhighway to an outgoing superhighway.
The transfer of information from an incoming superhighway to an outgoing superhighway requires a finite amount of time due to transmission and switching delays in the network. The uncertainties in the time delays, known as delay variations, cause serious problems in the timing of the digital switching networks. The delay variations in the switching paths of a digital matrix are largely determined by the size of the network, its layout, and the switching device (such as integrated circuits) technology used. To overcome the effects of the delay and timing uncertainties of a network, a "guardspace" of several bits in the transmission rate must be allowed.
Because of the time delay uncertainties and a high speed transmission rate, the data is received asynchronously. Available data receivers are relatively slow.